Organization of TAPA Output Files
Based on different input options, tapac will generate multiple potential output files.
The XO Object
In the most basic case, tapac
takes in the source code and generate an XO object with the suffix .xo
. The XO object will be passed to the Vitis v++
compiler as the input for bitstream generation.
Actually, the XO object is a
.zip
file with a different name.If you
unzip
the XO object, you will see (1) all the RTLs corresponding to the C++ source code and (2) configuration files with metadata about the design.If you like, you could modify the contents of the XO file. Simply unzip the XO object and modify the RTL as you want, then zip it back and passing it to
v++
.
The XXX_generate_bitstream.sh script
tapac
will automatically generate this script, which will invokes v++
to compile the .xo
object into the final bitstream. The parameters in the script will be matching the options passed to tapac.
By default, the script will use the
Explore
option foropt_design
,phys_opt_design
,route_design
and use theEarlyBlockPlacement
option forplace_design
.The default frequency target is 300 MHz. For HBM applications, you could edit the script if a lower frequency is enough to saturate the HBM bandwidth. We usually set the target slightly above what could be actually achieved.
The XXX_floorplan.tcl
If the --floorplan-output
option is given, tapac
will invoke AutoBridge to floorplan the design. This tcl script will encode the floorplan results and be consumed by v++
automatically. Specifically, the XXX_generate_bitstream.sh
script will point to the XXX_floorplan.tcl
for v++
.
tapac
Intermediate Files
If you provide the --work-dir
option (which is highly recommended), the intermediate files will be saved to work_dir
.
The
cpp
directory contains the C++ code for each task extracted bytapac
. Each of the C++ file here will be separately passed tovitis_hls
to be compiled into RTL.The
log
directory contains the logs from various steps, such ascsynth_design
byvitis_hls
and RTL synthesis by vivado.The
tar
directory contains one or multiple.tar
archive files. Each.tar
includes the output ofcsynth_design
of one task.The
hdl
directory contains the RTL files for all tasks generated byvitis_hls
. This directory also includes infrastructure RTL used bytapac
.program.json
records all contents and metadata of the input design.autobridge-xxx.log
records the details of the AutoBridge floorplanning process.pre-floorplan-config.json
records the entire input passed to AutoBridge.post-floorplan-config.json
records the entire output of AutoBridge.floorplan-region-to-instances.json
records the floorplanning results.To re-use the same floorplanning, use the
--floorplan-pre-assignments
option intapac
and provide this file.You could also edit this file to manipulate the floorplan.
task_graph.dot
is for the visualization of how the tasks are connected. You could see the generated graph here: https://dreampuf.github.io/GraphvizOnline/